Bitwise Operators

logic [7:0] a = 8'hA5;    // 1010_0101
logic [7:0] b = 8'hF0;    // 1111_0000
logic [7:0] result;
 
result = a &  b;   // AND:  1010_0000 = 8'hA0
result = a |  b;   // OR:   1111_0101 = 8'hF5
result = a ^  b;   // XOR:  0101_0101 = 8'h55
result = ~a;       // NOT:  0101_1010 = 8'h5A
result = a ~^ b;   // XNOR: 1010_1010 = 8'hAA  (complement of XOR)
 
// ── Four manipulation patterns ────────────────────────────────────
localparam logic [7:0] MASK = 8'h0F;   // 0000_1111
 
result = a &  MASK;    // EXTRACT lower nibble: 0000_0101 = 8'h05
result = a |  MASK;    // SET lower nibble:     1010_1111 = 8'hAF
result = a & ~MASK;    // CLEAR lower nibble:   1010_0000 = 8'hA0
result = a ^  MASK;    // TOGGLE lower nibble:  1010_1010 = 8'hAA

module tb_bitwise_basic;
 
logic [7:0] a = 8'hA5;   // 1010_0101
logic [7:0] b = 8'hF0;   // 1111_0000
 
initial begin
$display("a       = %08b  (0x%0h)", a, a);
$display("b       = %08b  (0x%0h)", b, b);
$display("────────────────────────────────");
$display("a & b   = %08b  (0x%0h)", a & b,  a & b);   // AND
$display("a | b   = %08b  (0x%0h)", a | b,  a | b);   // OR
$display("a ^ b   = %08b  (0x%0h)", a ^ b,  a ^ b);   // XOR
$display("~a      = %08b  (0x%0h)", ~a,     ~a);       // NOT
$display("a ~^ b  = %08b  (0x%0h)", a ~^ b, a ~^ b);  // XNOR
 
// XOR self-cancels
$display("a ^ a   = %08b  (should be 0)", a ^ a);
 
$finish;
end
 
endmodule

a       = 10100101  (0xa5)
b       = 11110000  (0xf0)
────────────────────────────────
a & b   = 10100000  (0xa0)
a | b   = 11110101  (0xf5)
a ^ b   = 01010101  (0x55)
~a      = 01011010  (0x5a)
a ~^ b  = 10101010  (0xaa)
a ^ a   = 00000000  (should be 0)

module tb_reg_manipulation;
 
// Imagine a control register layout:
// [7:6] MODE    [5:4] SPEED    [3] ERR_INT_EN    [2] TX_EN    [1] RX_EN    [0] RST
 
localparam logic [7:0]
MASK_MODE     = 8'hC0,   // 1100_0000
MASK_SPEED    = 8'h30,   // 0011_0000
MASK_ERR_INT  = 8'h08,   // 0000_1000
MASK_TX_EN    = 8'h04,   // 0000_0100
MASK_RX_EN    = 8'h02,   // 0000_0010
MASK_RST      = 8'h01;   // 0000_0001
 
logic [7:0] ctrl_reg = 8'h00;
 
initial begin
 
// ── SET: enable TX and RX ─────────────────────────────────────
ctrl_reg = ctrl_reg | MASK_TX_EN | MASK_RX_EN;
$display("After SET TX+RX: 0x%0h (%08b)", ctrl_reg, ctrl_reg);
// 0x06 = 0000_0110
 
// ── CLEAR: disable RX only ───────────────────────────────────
ctrl_reg = ctrl_reg & ~MASK_RX_EN;
$display("After CLR RX:    0x%0h (%08b)", ctrl_reg, ctrl_reg);
// 0x04 = 0000_0100
 
// ── EXTRACT: read the MODE field ─────────────────────────────
logic [1:0] mode_val;
ctrl_reg = 8'hC4;   // set mode bits for demo
mode_val = (ctrl_reg & MASK_MODE) >> 6;
$display("MODE field = %0d", mode_val);
// (0xC4 & 0xC0) >> 6 = 0xC0 >> 6 = 3
 
// ── TOGGLE: flip error interrupt enable ──────────────────────
ctrl_reg = ctrl_reg ^ MASK_ERR_INT;
$display("After TOGGLE ERR_INT: 0x%0h", ctrl_reg);
 
$finish;
end
 
endmodule

class DiagnosticScoreboard;
 
function void check(
input logic [31:0] expected,
input logic [31:0] actual,
input string        tag
);
logic [31:0] diff;
 
if (expected !== actual) begin
diff = expected ^ actual;   // 1 where bits differ, 0 where they match
$error("[SB] MISMATCH %s", tag);
$display("  expected : 0x%08h  (%032b)", expected, expected);
$display("  actual   : 0x%08h  (%032b)", actual,   actual);
$display("  XOR diff : 0x%08h  (%032b) ← 1=wrong bit", diff, diff);
// Count wrong bits
$display("  %0d bit(s) wrong", $countones(diff));
end
endfunction
 
endclass
 
module tb_xor_diag;
DiagnosticScoreboard sb;
 
initial begin
sb = new();
sb.check(32'hA5A5_A5A5, 32'hA5A5_A5A5, "txn_0");  // PASS
sb.check(32'hA5A5_A5A5, 32'hA5A5_A5A0, "txn_1");  // 3 bits wrong
$finish;
end
endmodule

class ErrorInjector;
 
// Inject a single-bit error at a random bit position
function logic [31:0] inject_single_bit(
input logic [31:0] data,
input int           bit_pos
);
logic [31:0] err_mask = 32'h1 << bit_pos;  // single 1-bit at bit_pos
return data ^ err_mask;                     // flip that bit
endfunction
 
// Inject burst errors across a range of bits
function logic [31:0] inject_burst(
input logic [31:0] data,
input logic [31:0] err_mask
);
return data ^ err_mask;   // flip every bit where mask is 1
endfunction
 
// Recovery: XOR is its own inverse — re-apply same mask to fix
function logic [31:0] repair(
input logic [31:0] corrupted,
input logic [31:0] err_mask
);
return corrupted ^ err_mask;   // XOR same mask again → original data
endfunction
 
endclass
 
module tb_error_inject;
ErrorInjector ei;
logic [31:0] original, corrupted, recovered;
 
initial begin
ei        = new();
original  = 32'hA5A5_A5A5;
corrupted = ei.inject_single_bit(original, 4);
recovered = ei.repair(corrupted, 32'h10);   // same mask: 1<<4
 
$display("Original : 0x%08h", original);
$display("Corrupted: 0x%08h  (bit 4 flipped)", corrupted);
$display("Recovered: 0x%08h  (matches original: %0b)",
recovered, recovered === original);
$finish;
end
endmodule

Original : 0xa5a5a5a5
Corrupted: 0xa5a5a5b5  (bit 4 flipped)
Recovered: 0xa5a5a5a5  (matches original: 1)

logic [7:0]  byte_val  = 8'hFF;
logic [15:0] word_val  = 16'hFFFF;
 
// byte_val zero-extended to 16 bits before AND
logic [15:0] result = byte_val & word_val;
// = 16'h00FF & 16'hFFFF = 16'h00FF
// Not 16'hFFFF — only lower 8 bits are preserved
 
$display("result = 0x%0h", result);   // 0xff

// ── 1. Extract protocol field from packed bus ─────────────────────
logic [31:0] axi_araddr;
logic [7:0]  page_id   = (axi_araddr >> 12) & 8'hFF;  // bits [19:12]
logic [11:0] page_offset = axi_araddr & 12'hFFF;          // bits [11:0]
 
// ── 2. Check specific flag in status register ─────────────────────
logic [7:0] status;
if (status & 8'h04)                // bit 2 set?
$display("TX FIFO overflow detected");
 
// ── 3. Build expected register value from fields ──────────────────
function logic [31:0] build_ctrl_reg(
input logic [1:0] mode,
input logic        tx_en,
input logic        rx_en
);
return ((mode & 2'h3) << 6)
| (tx_en << 2)
| (rx_en << 1);
endfunction
 
// ── 4. Even parity generation using XOR (across all bits) ─────────
// Note: reduction ^ covered in 4.5, but multi-input XOR is bitwise
function logic calc_parity(input logic [7:0] data);
return ^data;   // reduction XOR — counts 1s, 1 if odd
endfunction
 
// ── 5. Error injection — corrupt specific byte in a 32-bit word ──
function logic [31:0] corrupt_byte(
input logic [31:0] data,
input int           byte_idx   // 0=LSB, 3=MSB
);
logic [31:0] err_mask = 32'hFF << (byte_idx * 8);
return data ^ err_mask;
endfunction

// Register: [7:5]=FLAGS  [4:2]=TYPE  [1:0]=STATUS
logic [7:0] reg_val = 8'b101_011_10;   // FLAGS=5, TYPE=3, STATUS=2
 
// BUGGY: wrong mask for TYPE field — mask should cover bits [4:2]
logic [2:0] type_buggy = (reg_val & 8'h0E) >> 1;
// 8'h0E = 0000_1110 — covers bits [3:1], not [4:2]!
// Extracting the WRONG field by one bit
$display("Buggy TYPE = %0d", type_buggy);   // 7 — wrong!

// CORRECT: mask bits [4:2] = 0001_1100 = 8'h1C, shift right by 2
logic [2:0] type_correct = (reg_val & 8'h1C) >> 2;
$display("Correct TYPE = %0d", type_correct);   // 3 — correct
 
// Better: use part-select directly when possible
logic [2:0] type_clean = reg_val[4:2];
$display("Clean TYPE  = %0d", type_clean);     // 3 — cleanest approach

// BUGGY: attempting to set SPEED field (bits [5:4]) to value 2'b10
// But the old value still has bits set in that field!
logic [7:0] ctrl = 8'h3F;   // 0011_1111 — SPEED field = 2'b11
 
ctrl = ctrl | (2'b10 << 4);
// 0011_1111 | 0010_0000 = 0011_1111  ← old 2'b11 | new 2'b10 = 2'b11
// OR cannot clear bits — old 1s remain. SPEED is still 2'b11, not 2'b10
$display("Buggy ctrl = 0x%0h", ctrl);   // 0x3f — unchanged

localparam logic [7:0] SPEED_MASK = 8'h30;   // 0011_0000
logic [7:0] ctrl = 8'h3F;
 
// CORRECT: clear field first with AND ~mask, then set with OR
ctrl = (ctrl & ~SPEED_MASK)        // clear bits [5:4]
| ((2'b10 << 4) & SPEED_MASK); // set new value
$display("Fixed ctrl  = 0x%0h", ctrl);
// (0x3F & 0xCF) | 0x20 = 0x0F | 0x20 = 0x2F — SPEED=2'b10 correctly

logic [7:0] expected = 8'hA5, actual = 8'hA5;
 
// BUGGY: XOR gives 0 when equal, but 0 in if-condition is FALSE
// Engineer reads "if (a ^ b)" as "if a equals b" — wrong!
if (expected ^ actual)
$display("Values are equal");    // never prints — 0 is false
else
$display("Values differ");       // always prints when equal — backwards!

// XOR for DIFFERENCE DETECTION — 0 means equal, nonzero means differ
if (expected ^ actual)
$display("Values DIFFER: diff=0x%0h", expected ^ actual);
else
$display("Values EQUAL");    // else branch = XOR was 0 = equal
 
// For direct equality check, use == or ===
if (expected === actual)
$display("Values EQUAL");