Logical Operators

// ── Logical AND — both must be true (nonzero) ────────────────────
if (valid && ready)       drive_data();
if (count > 0 && !error) process();
 
// ── Logical OR — at least one must be true ────────────────────────
if (timeout || abort)     stop_sim();
if (a == 0 || b == 0)   skip_multiply();
 
// ── Logical NOT — boolean inversion ──────────────────────────────
if (!done)                wait_more();
if (!$isunknown(sig))     sample_coverage();
 
// ── !  on multi-bit values ───────────────────────────────────────
bit r;
r = !8'hFF;    // r = 0  (FF is nonzero → true → !true = 0)
r = !8'h00;    // r = 1  (00 is zero  → false → !false = 1)
r = !8'hA5;    // r = 0  (A5 is nonzero → 0)
 
// ── Return type — always 1-bit ────────────────────────────────────
bit [7:0] a = 8'hF0, b = 8'h0F;
bit        logical_result = a && b;  // 1  — both nonzero
bit [7:0] bitwise_result = a &  b;  // 8'h00 — no overlapping bits

module tb_logical_basic;
 
int a = 10, b = 0, c = 5;
 
initial begin
 
// ── && — both must be nonzero ─────────────────────────────────
$display("a && c  : %0b", a && c);    // 1  (10 && 5  — both nonzero)
$display("a && b  : %0b", a && b);    // 0  (10 && 0  — b is zero)
$display("b && b  : %0b", b && b);    // 0
 
// ── || — at least one must be nonzero ────────────────────────
$display("a || b  : %0b", a || b);    // 1  (10 || 0  — a is nonzero)
$display("b || b  : %0b", b || b);    // 0  (0  || 0)
$display("a || c  : %0b", a || c);    // 1
 
// ── ! — boolean inversion ────────────────────────────────────
$display("!a      : %0b", !a);         // 0  (a=10, nonzero → 1 → !1 = 0)
$display("!b      : %0b", !b);         // 1  (b=0,  zero   → 0 → !0 = 1)
$display("!!a     : %0b", !!a);        // 1  (double negate — boolean normalise)
 
$finish;
end
 
endmodule

a && c  : 1
a && b  : 0
b && b  : 0
a || b  : 1
b || b  : 0
a || c  : 1
!a      : 0
!b      : 1
!!a     : 1

module tb_logical_vs_bitwise;
 
logic [7:0] status_a = 8'hF0;   // nonzero — "has activity"
logic [7:0] status_b = 8'h0F;   // nonzero — "has activity"
logic [7:0] bitwise_result;
bit          logical_result;
 
initial begin
logical_result = status_a && status_b;
bitwise_result = status_a &  status_b;
 
$display("status_a    = 0x%0h (%08b)", status_a, status_a);
$display("status_b    = 0x%0h (%08b)", status_b, status_b);
$display("a && b     = %0b   (logical AND)",  logical_result);
$display("a &  b     = 0x%0h (bitwise AND)", bitwise_result);
 
// In if conditions — completely different control flow
if (status_a && status_b)
$display("LOGICAL:  both statuses active — branch TAKEN");
 
if (status_a & status_b)    // 8'h00 — evaluates as FALSE
$display("BITWISE:  this will NOT print");
else
$display("BITWISE:  no bit overlap — branch SKIPPED (wrong!)");
 
// ! vs ~ on same value
$display("!status_a  = %0b   (logical: nonzero → 0)",  !status_a);
$display("~status_a  = 0x%0h (bitwise: all bits flipped)", ~status_a);
 
$finish;
end
 
endmodule

status_a    = 0xf0 (11110000)
status_b    = 0x0f (00001111)
a && b     = 1   (logical AND)
a &  b     = 0x0 (bitwise AND)
LOGICAL:  both statuses active — branch TAKEN
BITWISE:  no bit overlap — branch SKIPPED (wrong!)
!status_a  = 0   (logical: nonzero → 0)
~status_a  = 0xf (bitwise: all bits flipped)

class AhbDriver;
 
bit enabled    = 1;
int err_count  = 0;
int pkt_budget = 100;
 
// ── Multi-condition guard — all && must be true ───────────────
function bit can_drive();
return (enabled && !err_count && pkt_budget > 0);
// enabled=1 AND no errors AND budget remaining
// If ANY is false → short-circuits → returns 0
endfunction
 
// ── OR for alternative conditions ────────────────────────────
function bit should_abort(bit timeout, bit fatal_err);
return (timeout || fatal_err);
// Either condition alone is sufficient to abort
endfunction
 
// ── ! for clean enable inversion ─────────────────────────────
task drive_packet(input [31:0] data);
if (!can_drive()) begin
$warning("Driver blocked — not driving");
return;
end
pkt_budget--;
$display("[DRV] Driving 0x%08h", data);
endtask
 
endclass
 
module tb_driver;
AhbDriver drv;
 
initial begin
drv = new();
drv.drive_packet(32'hA5A5_A5A5);   // OK — all conditions met
drv.err_count = 1;
drv.drive_packet(32'h1234_5678);   // Blocked — err_count nonzero
$finish;
end
endmodule

module tb_short_circuit;
 
int call_count = 0;
 
function int side_effect_fn();
call_count++;
$display("[FN] called — count now %0d", call_count);
return 1;
endfunction
 
initial begin
 
// && short-circuit: left=0, right function never called
call_count = 0;
if (0 && side_effect_fn())
$display("branch taken");
$display("After 0 && fn: call_count=%0d", call_count);   // 0 — fn not called
 
// || short-circuit: left=1, right function never called
call_count = 0;
if (1 || side_effect_fn())
$display("branch taken");
$display("After 1 || fn: call_count=%0d", call_count);   // 0 — fn not called
 
// Bitwise &: NO short-circuit — both sides always evaluate
call_count = 0;
if (0 & side_effect_fn())
$display("branch taken");
$display("After 0 &  fn: call_count=%0d", call_count);   // 1 — fn WAS called!
 
$finish;
end
 
endmodule

After 0 && fn: call_count=0
branch taken
After 1 || fn: call_count=0
[FN] called — count now 1
After 0 &  fn: call_count=1

// ── 1. SVA disable iff — suppress assertion during reset/X ────────
assert property (
@(posedge clk) disable iff (!rst_n || $isunknown(data))
valid |-> ##1 ack
) else $error("ACK not received");
// !rst_n: suppress during reset
// $isunknown(data): suppress when data has X — avoids false failures
 
// ── 2. Queue access guard — short-circuit prevents out-of-bounds ──
if (exp_q.size() > 0 && exp_q[0].id == dut_id) begin
// exp_q[0] only accessed if queue is nonempty — safe
exp_q.pop_front();
end
 
// ── 3. Multi-condition constraint guard ───────────────────────────
constraint c_valid_op {
// Only set error flag if in error injection mode AND budget remains
err_inject && (err_budget > 0) -> err_flag == 1;
}
 
// ── 4. Coverage sampling guard ────────────────────────────────────
function void sample_cov(logic [7:0] op, logic valid);
if (valid && !$isunknown(op))
cov_group.sample();
endfunction
 
// ── 5. Timeout abort condition ────────────────────────────────────
always @(posedge clk) begin
if (watchdog_expired || fatal_protocol_error) begin
$error("[TB] Simulation aborted");
$finish;
end
end

logic [7:0] pkt_type   = 8'h02;   // bit 1 set — "type B"
logic [7:0] wr_enable  = 8'h01;   // bit 0 set — "write enabled"
 
// BUGGY: programmer checks "both signals are nonzero"
// But bitwise & of 0x02 and 0x01 = 0x00 — evaluates as FALSE
if (pkt_type & wr_enable)
$display("Write packet — sending");   // NEVER fires despite both being nonzero
else
$display("Not a write packet");      // Always fires — wrong

// FIX: use && to check "are both signals nonzero?"
if (pkt_type && wr_enable)
$display("Write packet — sending");   // Fires correctly
 
// If the intent was "does pkt_type have the write bit set?"
// use a specific bit mask with bitwise &:
localparam bit [7:0] WRITE_BIT = 8'h01;
if (pkt_type & WRITE_BIT)               // bitwise mask check — intentional
$display("Write bit set in pkt_type");

logic [7:0] mask = 8'h0F;
logic [7:0] inv_mask;
 
// BUGGY: programmer wants to invert the mask bits
inv_mask = !mask;   // !8'h0F → 8'h0F is nonzero → 1 → inv_mask = 8'h00
// WRONG: expected 8'hF0, got 8'h00
$display("inv_mask = 0x%0h", inv_mask);   // prints: 0x0

logic [7:0] mask = 8'h0F;
logic [7:0] inv_mask;
 
// CORRECT: ~ inverts every bit in the vector
inv_mask = ~mask;   // ~8'h0F → 8'hF0
$display("inv_mask = 0x%0h", inv_mask);   // prints: 0xf0

int pkt_count = 0;
 
function int get_and_count();
pkt_count++;
return 1;
endfunction
 
// BUGGY: programmer expects get_and_count() to always run
// But if left side is 0, short-circuit prevents the call
bit gate = 0;
if (gate && get_and_count())
$display("branch taken");
 
$display("pkt_count = %0d", pkt_count);   // 0 — function was never called!
// Programmer expected 1

// FIX: call the function first, capture result, then use in condition
bit  gate   = 0;
bit  fn_res = get_and_count();   // always called, side effect guaranteed
if (gate && fn_res)
$display("branch taken");
 
$display("pkt_count = %0d", pkt_count);   // 1 — correct