DDR3 / DDR4 / DDR5
DDR memory protocols — command sequencing, training, refresh, and timing margins.
Expert 4h 40m readMemoryJEDEC
Memory bandwidth is the bottleneck of modern compute. DDR verification is one of the most respected specializations in the industry.
What you'll learn
- DDR fundamentals — bank groups, banks, rows, columns
- Command and address bus
- Activate, read, write, precharge, refresh
- Timing parameters: tRCD, tRP, tRAS, tCAS, tRC
- DDR3 vs DDR4 vs DDR5 — bank group architecture, on-die ECC
- Memory controller scheduling
- Verifying a DDR controller against vendor BFMs